Abstract:

Timing synchronization algorithm based on training sequence in multi-input multi-output-orthogonal frequency division multiplexing ( MIMO-OFDM) system were demonstrated. With a view to hardware implementation of timing synchronization algorithm in MIMO-OFDM system, the complexity of timing synchronization algorithm implementation with FPGA(field programmable gate array) was analyzed according to multiplying and adding frequency in unit time. To make the timing synchronization algorithm in MIMO-OFDM system less complicated during FPGA implementation, after study on sub-modules in individual timing synchronizing module and relationship among multiple timing synchronizing modules, a simplified implementation scheme for MIMO-OFDM system timing synchronization algorithm was brought forward, and statistics on resource occupation of such a scheme in VirtexII-Pro series FPGA of Xilinx Company was given. Study shows the simplified implementation scheme is applicable in hardware implementation of MIMO-OFDM system timing synchronization algorithm.

Key words: timing synchronization, multi-input multi-output, orthogonal frequency-division multiplexing, field programmable gate array